Research Approach

We will organize our research around a conceptual framework of interacting pieces that provide the prerequisites to rapidly adapt to and optimally exploit wildly heterogeneous systems. To be able to make best use of scarce resources, we will concentrate on the most pressing and promising issues of such a conceptual framework rather than trying to build an integrated platform. Our research will allow applications, designed to make use of this framework, to move to novel materials with little, ideally no, changes.

The key element of the conceptual framework for wildly heterogeneous systems is its design as a network of, potentially heterogeneous, computing nodes. A node consists of an integrated set of functional units, hardware accelerators, or I/O devices, possibly incorporating different materials, and is the unit with which the software layers work. Each such node runs a small software kernel interface and some parts of application software. Nodes are interconnected by a flexible on-chip network and cooperate to achieve a common goal. In such networks of nodes, changes may occur statically at production and design time or dynamically at run-time and may affect the nodes or the network. In the following sections, we will describe how we plan to prepare for such changes in each piece of the framework and how the pieces are made to interact.

For each piece of the framework, we will investigate a particular technology or method that looks most promising. These technologies will be replaced by alternatives if the promises cannot be met. The table shows the 6 Research Modules that correspond to these technologies and their interactions. Close interaction with the Materials-Inspired Paths will be ensured by special sessions in the planned semi-annual Research Festivals and through active involvement of other Path Leaders. In its research program, this Path integrates the expertise of the two new Strategic Professorships Processor Design and Compiler Construction, and of the planned ZMDI endowed professorship Circuits for Energy Efficiency. Furthermore, two Research Group Leaders will be created for this Path, namely Microkernel-Based Systems (RGL1) and Heterogeneous System-Software Verification (RGL2).

For further details refer to our publications and, in particular, our overview paper: Marcus Völp, et al. "The Orchestration Stack: The Impossible Task of Designing Software for Unknown Future Post-CMOS Hardware", Proceedings of the 1st International Workshop on Post-Moore s Era Supercomputing (PMES), Co-located with The International Conference for High Performance Computing, Networking, Storage and Analysis (SC16), Salt Lake City, USA, Nov 2016.